apex signal, a division of nai, inc. 631.567.1100/631.567.1823(fax) 1-17-01 s 75 sd1 a001 rev 1.4 170 wilbur place, bohemia, ny, 11716,usa www.naii.com / e-mail:sales@naii.com code:ovgu1 page 1 of 4 apex signal, a division of nai, inc . cpci-75sd1 cpci eight (8) synchro/resolver-to-digital two-speed or single speed or combinations (programmable) multi-speed ratios: 2 to 255; optional internal reference accurate velocity outputs, continuous self test to commercial or military specifications 16 bit resolution (24 bit combined) 1 arc minute accuracy continuous background bit testing with reference and signal loss detection power-on self-test (post) s/d channels are self-calibrating 50 hz to 10 khz encoder (a & b) plus index outputs; programmable resolution equivalent a, b, & c hall effect commutation outputs synchro/resolver programmable transformer isolated accurate digital velocity outputs latch feature synthetic reference compensates for 60 phase shift i/o via front panel, j2 or both 2,4,or 8 channels available commercial or severe environment mil description: this single slot card contains eight separate transformer isolated synchro/resolver-to-digital tracking converters, optional 5 va reference, and extensive diagnostics. the (8) measurement channels also produce differential incremental encoder (a&b) outputs (with programmable resolution) and a zero degree marker pulse or commutation outputs for 4, 6, or 8 pole brushless dc motors that eliminate the need for hall effect sensors on the motor thus eliminating processor time and reducing bus traffic. the s/r/d channels incorporate high linearity digital velocity outputs, angle change alert and can be field configured for either single speed or multi-speed to any ratio between 2 and 255. ambiguity circuits maintain monotonic outputs by compensating for misalignment between the coarse and fine synchros, however, the processor will set a flag when it senses that the max. allowable misalignment of 90 /gear ratio is exceeded. the s/r/d channels, even when large accelerations are encountered, never looses tracking, because they incorporate the unique capability to automatically shift to higher bandwidths. the shifting is smooth and continuous with no glitches. tracking rates are only limited to bandwidth restrictions, up to 150 rps, at 16 bit resolution. the ?latch? feature permits the user to read all channels at the same time. reading will unlatch the channel. the use of type ii servo loop processing techniques enables tracking, at full accuracy, up to the specified rate. a step input will not cause any hang-up condition. intermediate transparent latches, assure that current valid data is always available for any channel without effecting the tracking performance of the converters. each channel can be specified for a different voltage,frequency or resolution. to simplify logistics, part number, s/n, date code, & rev. are located in permanent memory locations.
apex signal, a division of nai, inc. 631.567.1100/631.567.1823(fax) 1-17-01 s 75 sd1 a001 rev 1.4 170 wilbur place, bohemia, ny, 11716,usa www.naii.com / e-mail:sales@naii.com code:ovgu1 page 2 of 4 major diagnostics are incorporated to offer substantial improvements to system reliability because the user is alerted to channel malfunctions. this approach also reduces bus traffic because the status registers do not require constant polling. power-on, self-test (post) diagnostic can immediately initiate (d3) test. see programming instructions for further details. three different tests (one on-line and two off-line) can be selected: the (d2) test initiates automatic background bit testing. each channel is checked every 5 to a test accuracy of 0.05 and each signal and reference is always monitored. any failure triggers an interrupt (if enabled) and the results are available in status registers. the testing is totally transparent to the user, requires no external programming, has no effect on the standard operation of this card and can be enabled or disabled via the bus. the (d3) test initiates a bit test that disconnects all input channels from the outside and connects them across an internal stimulus that generates and tests 72 different angles to a test accuracy of 0.05 . external reference is not required. this testing requires no external programming, and can be enabled or disabled via the bus. the (d0) test is used to check the card and the cpci interface. all input channels are disconnected from the outside world thus allowing user to write any number of angles to the card and then read the data from the cpci interface. external reference is not required for this test. this board can operate over a "c" or "m" operating temperature range (see part number). the "c" version (0c to +70c) uses standard high quality commercial semiconductors. the "m" version (-55c to +85c, used for severe environmental condition, uses high quality extended temperature semiconductors. conduction cooling, using a thermal plane and wedge locks, can be specified by adding "w" to p/n. a stiffener improves vibration response. both sides of the board can be conformal coated (see p/n). all ?m? boards are burned in for 24 hours and cycled from -55c to +85c. specifications: applies to each channel resolution: 16 bits (24 bits for two-speed mode ) accuracy: 1 arc minute for single speed inputs 20 arc seconds (.0055 ) for two-speed at any ratio and 16 bit resolution tracking rate: 18.5 rps max. at 60 hz; 150 rps max. above 400 hz. (referred to fine input in a two-speed configuration) bandwidth: normal is 10 hz at 60 hz carrier; 40 hz at 400 hz carrier, and 100 hz above 1 khz carrier. can be readily customized input format: synchro, resolver or combination. (see part number) gear ratio: each channel pair is programmable from 2 to 255 input voltage: resolver : 2-28 v l-l autoranging, 90 v l-l synchro : 11.8 v l-l , 90 v l-l synchro and resolver inputs are transformer isolated input impedance: 40 k ? min. up to 28 v l-l , 100 k ? min. at 90 v l-l reference: 2-28 vrms, autoranging or 115 vrms fixed. transformer isolated. reference zin 100 k ? min. frequency: 50 hz to 10 khz (see part number) encoder outputs: either 12,13,14,15, or 16 bit resolution, (field programmable) and index marker. 12 bit resolution is equivalent to 1,024 cycles (4,096 transitions) etc. differential outputs. the encoder resolution is fixed and does not change with speed. (optional, see p/n). commutation outputs: equivalent to the a, b, c outputs from hall effect sensors for 4, 6 or 8 pole motors angle change alert: each channel can be set to a different angle differential. when that differential is exceeded, an interrupt (if enabled) is triggered. default: ?ch. disabled?. msb=180 ; min. differential is 0.05 . max. differential that can be programmed is 179.9 degrees. phase shift: the synthetic reference circuit automatically compensates for phase shifts between the transducer excitation and output up to 60 . velocity, digital: 16 bit resolution; linearity: 0.1%. scalable to 0.1 /sec resolution.
apex signal, a division of nai, inc. 631.567.1100/631.567.1823(fax) 1-17-01 s 75 sd1 a001 rev 1.4 170 wilbur place, bohemia, ny, 11716,usa www.naii.com / e-mail:sales@naii.com code:ovgu1 page 3 of 4 wrap around self test: the three different powerful test methods are detailed in the description section and further described in the programming instructions. power: +5 vdc,+/- 12 vdc temperature,operating: ?c?= 0 to + 70 degrees c, ?m?= -55 to + 85 degrees c temperature,storage: -55 to +105 degrees c size: 3u, single slot 233.4mm x 20.3mm x 160mm deep weight: 20 oz. reference: optional. (see part number). voltage: 2.0-28 vrms programmable, resolution 0.1 vrms, or 115 vrms fixed. accuracy 2%; frequency: 360 hz to 10 khz 1% with 1 hz resolution. regulation: 10% max. no load to full load. output power: 5 va max. at 40 min. inductive. code table code input ref freq. comments 01 11.8 26 400 02 90 115 400 03 90 115 60 05 2-26 2-26 400 06 2-26 2-26 10,000 50 2 4 5,000 4 channels tracking at 300 rps
apex signal, a division of nai, inc. 631.567.1100/631.567.1823(fax) 1-17-01 s 75 sd1 a001 rev 1.4 170 wilbur place, bohemia, ny, 11716,usa www.naii.com / e-mail:sales@naii.com code:ovgu1 page 4 of 4 part number designation 75sd1- xx x x x x - xx total number of channels 02 ? 2 s/d channels 04 ? 4 s/d channels 08 ? 8 s/d channels code (see code table) environmental c = 0 c to +70 c m = -55 c to +85 c h = m with removable conformal coating k = c with removable conformal coating format s = synchro r = resolver m = mixed (see code table) p = synchro/resolver programmable mechanical f = front panel i/o only b = front panel i/o and j2 i/o p = j2 i/o only note : j2 connections can not be used for analog signals in a pxi chassis. analog outputs must be via the front panel i/o only (f). *encoder/commutation outputs are via the j2 connector only ** common reference inputs are tied to the on-board reference supply options with on-board reference: 1 = one common reference input ** 2 = individual reference inputs 3 = one common reference input with programmable encoder (a & b) and index/commutation * ** 4 = individual reference inputs with programmable encoder (a & b) and index/commutation * without on-board reference: 5 = one common reference input 6 = individual reference inputs 7 = one common reference input; programmable encoder (a & b) and index/commutation * 8 = individual reference inputs; programmable encoder (a & b) and index/commutation * custom design: 9 = custom design (see separate spec)
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